Highly reliable a‐Si:H gate driver on array with complementary double‐sided noise‐eliminating and dual voltage levels for TFT‐LCD applications
Guang‐Ting Zheng, Po‐Tsun Liu, Jo‐Lin Chen, C.-C. Li
National Yang Ming Chiao Tung University
阅读操作
确认中在文库中上传 PDF 后可生成中文音频讲解。
摘要与影响
In this work, we present a high‐reliability gate driver on array (GOA) for a 10.7‐in. HD (1,280 × RGB × 720) TFT‐LCD panel, featuring an alternatively double‐sided noise‐eliminating function. The gate driver circuit is designed with 12‐phase clock signals that exhibit 75% signal overlapping, threshold voltage recovering, and double‐sided driving schemes. The double‐sided driving scheme reduces the number of mental wires and TFTs in the gate driver circuit, resulting in a smaller layout area for GOA. By utilizing dual levels of voltage, we implemented a negative gate bias method to mitigate threshold voltage shifts for the noise‐eliminating and driving TFTs. This prevents the noises from clock signals effectively. The reliability test of the proposed GOA with 720 stages passed a strict testing condition (90°C and −40°C) for simulation and exhibited good performance over 800 hours at 90°C for measurement.
逐年被引趋势
关键指标
同类平均 = 1
同领域 · 同年份 · 同类型
Google Scholar 与 OpenAlex 的被引统计范围不同,数值存在差异属正常。
AI 辅助阅读
依据:摘要
可就本文提问;依据不足时会说明。
学术脉络
学科主题
工程Semiconductor materials and devices
Integrated Circuits and Semiconductor Failure Analysis · Electrostatic Discharge in Electronics
参考文献 12
此处列出前 3 条
引用本文 2
按被引量排序,此处列出前 3 条