研究论文

Archive-driven reinforcement learning for FPGA logic optimization

Junhan Zhu, Zhongyan Xu, Jicong Fan, Xijun Cheng, Zhiguo Yu, Xiaofeng Gu

Jiangnan University　China Electronics Technology Group Corporation

来源Integration

年份2026

DOI10.1016/j.vlsi.2026.102742

原文https://doi.org/10.1016/j.vlsi.2026.102742

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逐年被引趋势

110

126

关键指标

被引次数 · OpenAlex

2.52

领域内被引倍数
同类平均 = 1

前 11%

引用位次
同领域 · 同年份 · 同类型

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Google Scholar 与 OpenAlex 的被引统计范围不同，数值存在差异属正常。

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学术脉络

学科主题

工程

VLSI and FPGA Design Techniques

Embedded Systems Design Techniques · Evolutionary Algorithms and Applications

参考文献 16

DAG-aware AIG rewriting a fresh look at combinational logic synthesis

Alan Mishchenko, Satrajit Chatterjee, Robert K. Brayton · 2006

被引 493

FlowMap: an optimal technology mapping algorithm for delay optimization in lookup-table based FPGA designs

J. Cong, Yuzheng Ding · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 1994

被引 683

Heuristics for Area Minimization in LUT-Based FPGA Technology Mapping

Valavan Manohararajah, Stephen D. Brown, Z.G. Vranesic · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 2006

被引 127

此处列出前 3 条

引用本文 1

Reinforcement learning for hardware acceleration and system-level optimization on FPGA and integrated-circuit platforms: A survey

Hamza Kheddar · Journal of Systems Architecture · 2026

被引 4

按被引量排序，此处列出前 3 条

摘要与影响

摘要 · 节选

暂未获取摘要。可打开原文或 PDF，后续可基于全文生成更完整的速读。

逐年被引趋势

110

126

关键指标

被引次数 · OpenAlex

2.52

领域内被引倍数
同类平均 = 1

前 11%

引用位次
同领域 · 同年份 · 同类型

参考文献

Google Scholar 与 OpenAlex 的被引统计范围不同，数值存在差异属正常。

学术脉络

学科主题

工程

VLSI and FPGA Design Techniques

Embedded Systems Design Techniques · Evolutionary Algorithms and Applications

参考文献 16

DAG-aware AIG rewriting a fresh look at combinational logic synthesis

Alan Mishchenko, Satrajit Chatterjee, Robert K. Brayton · 2006

被引 493

FlowMap: an optimal technology mapping algorithm for delay optimization in lookup-table based FPGA designs

J. Cong, Yuzheng Ding · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 1994

被引 683

Heuristics for Area Minimization in LUT-Based FPGA Technology Mapping

Valavan Manohararajah, Stephen D. Brown, Z.G. Vranesic · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 2006

被引 127

此处列出前 3 条