Polarity control in WSe2 double-gate transistors
Giovanni V. Resta, Surajit Sutar, Yashwanth Balaji, Dennis Han-Chung Lin, Praveen Raghavan, Iuliana P. Radu, Francky Catthoor, Aaron Voon Yew Thean 等 10 位
École Polytechnique Fédérale de Lausanne IMEC KU Leuven University of Utah
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As scaling of conventional silicon-based electronics is reaching its ultimate limit, considerable effort has been devoted to find new materials and new device concepts that could ultimately outperform standard silicon transistors. In this perspective two-dimensional transition metal dichalcogenides, such as MoS2 and WSe2, have recently attracted considerable interest thanks to their electrical properties. Here, we report the first experimental demonstration of a doping-free, polarity-controllable device fabricated on few-layer WSe2. We show how modulation of the Schottky barriers at drain and source by a separate gate, named program gate, can enable the selection of the carriers injected in the channel, and achieved controllable polarity behaviour with ON/OFF current ratios >10(6) for both electrons and holes conduction. Polarity-controlled WSe2 transistors enable the design of compact logic gates, leading to higher computational densities in 2D-flatronics.
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