Electrical characteristics of planar nanoscale vacuum channel devices

In the post-Moore era, nanoscale vacuum channel devices (NVCDs) have emerged as promising candidates for electronic applications, owing to their low power consumption and high reliability. However, performance enhancements are required for NVCDs, as they currently suffer from low emission current and poor rectification behaviour. This study proposed an asymmetric diode array structure to enhance emission current and improve rectification performance. Additionally, the relationship between tip-to-tip spacing and the shielding effect within the array was investigated. Furthermore, a nanoscale vacuum channel transistor (NVCT) featuring a back-gate structure was introduced. Simulations were conducted to investigate how gate dielectric thickness influences key electrical properties, including transconductance, gate–cathode capacitance, and cutoff frequency. Simulation results revealed that increasing tip-to-tip spacing mitigates shielding effect, thereby enhancing the cathode tip electric field and lowering the turn-on voltage. In the back-gate NVCT array, decreasing the gate dielectric thickness improved gate control over the emission current. These findings offer valuable insights and practical guidelines for optimizing the design of NVCDs.