Selective isotropic wet etching of TiN and TaN for high k metal gate structure

As the size of the semiconductor device continues to shrink, two integration approaches are used for gate module; (1) gate first, and (2) gate last. The gate last approach requires removal of thin (10–30Å) titanium nitride (TiN) diffusion blocking layers during the “replacement” process after the poly-Si layer is removed. An etch rate study was conducted to evaluate the selectivity of a combined aqueous/solvent cleaning chemistry at various temperatures on blanket TiN and TaN wafers to identify the optimum operating regime. A significant improvement of yield with the application of the new cleaning approach has been observed.