Process integration of 3D Si interposer with double-sided active chip attachments
Pei-Jer Tzeng, John H. Lau, Chau‐Jie Zhan, Yu-Chen Hsin, Po-Chih Chang, Yiu-Hsiang Chang, Jui‐Chin Chen, Shang-Chun Chen 等 19 位
Industrial Technology Research Institute Rambus (United States)
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摘要与影响
A double-sided Si passive interposer connecting active dies on both sides for a 3D IC integration is investigated. This interposer is 100μm-thick with 10μm-diameter TSVs (through silicon vias), 3 RDLs (redistribution layer) on its front-side, 2 RDLs on its backside. It supports 2 active dies on its frontside and 1 active die at its backside. The present study focuses on the process integration of the passive interposer, double-sided chip assembly process, and passive electrical characterization.
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工程3D IC and TSV technologies
Nanofabrication and Lithography Techniques · Electronic Packaging and Soldering Technologies
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