A Novel Detection Applied on Micro Defect in Bump Interface for 2.5DIC Package
Yi‐Sheng Lin, Yu‐Hsiang Hsiao, Cheng-Hsin Liu, Fan-Ju Hsiao, Chen-Chao Wang, Chin-Pin Hung
Advanced Semiconductor Engineering (Taiwan)
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摘要与影响
With the increasing demands in high performance devices such as artificial intelligence (AI), networking, and datacenter, which are promoting the development of advanced packaging solutions for high-end applications. 2.5D packages with through-silicon via (TSV) interposers and micro bumps have bring as an effective packaging solution for heterogeneous integration. As more complexity structure in advanced package, the failure analysis (FA) will become more challenging to detect, and to find out the root cause. Therefore, ASE developed a special FA flow to figure out the assembly issue of bump for the complicated 2.5DIC package with micro defect which was unable to detect by function test. In our case study, the special FA methodology has been shown to be applicable for allocating the defect within a package. An essential electrical-FA technique to separate the fault isolation and identify the failure mode of failed package. Via lapping technology to remove silicon dies until micro bumps appeared. Using Micro-probing system with high resolution and sensitivity of tester to measure the electric resistance value between die and die connection. The failure mode of micro bump was verified by Focus Ion Beam (FIB) observation. Via elemental analysis to figure out the key factor of abnormal issue in micro bump interface. With this special FA flow, the analysis procedure and results on both of fault isolations as well physical analyses to further inspection the root cause have also been discussed in detail from case studies and the conclusion are presented at the end.
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工程Industrial Vision Systems and Defect Detection
VLSI and Analog Circuit Testing · Integrated Circuits and Semiconductor Failure Analysis
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