Digital Control Challenges in a Single-Phase CCM Totem-Pole PFC Rectifier with GaN Devices

This paper surveys the main challenges regarding the PFC totem pole digital control design and implementations, mainly addressing the problems related to the voltage controller design and handling of the zero-crossing point of the ac voltage. For a dual control loop totem pole PFC, analysis and design of the inner and outer control loop is given in detail. The voltage controller is implemented as a time delay filter (TDF) in series with a PI controller. A combination of feedback and feedforward control is used for the current control. This paper also provides a detailed analysis and proposes a simple and robust method for reducing the current spike at the zero-crossing point of the ac voltage, which appears intrinsically for this topology. In order to verify the theoretical analysis and to test proposed control methods, an experimental model of the totem pole PFC rectifier using GaN devices and operating at 250W/100kHz was developed and tested.