Heterogeneous Integration of High-Performance Compute, Memory and Optical Engine Chiplet on Large Reconstituted Interposer Package

A very large reconstituted interposer with embedded Universal Chiplet Interconnect Express (UCIe), High-Bandwidth Memory (HBM), and Optical Engine (OE) bridges is used as a packaging test vehicle to demonstrate the heterogeneous integration of accelerators/processors (xPU), HBM, and OEs directly on the interposer, enabling improved power efficiency, higher memory density, and greater off-package input/output (I/O) bandwidth. The packaging test vehicle supports process integration flow and material evaluations for this multi-chiplet system-in-package (SiP). The electrical, thermal and mechanical analysis considerations and measurements of test structures have been obtained.