2.5D Package SI&PI Assessment Approach

With the application requirements of AI, Automatic, cloud server, large-scale storage, ultra-high definition video communication network, the market demand for high speed bandwidth, low power consumption, low voltage, high-performance chips is more and more prominent. The design of 2.5DIC can well meet the above requirements. The chip process will inevitably lead to more complex processing of super large data, advanced process and chip design and verification. At the same time, it will also face many difficulties and challenges that need to be overcome in SI&PI simulation, For example, more complex modeling methods and more difficult model parameter extraction, and then much more higher requirements for problem analysis, verification and sign off standards. In this paper, aiming at the problem of highspeed Serial parallel signal evaluation, such as HBM2 and SerDes signal routing, in order to overcome the abovementioned difficulties and challenges, a novel of PI&SI analysis and evaluation scheme for interposer TSV is proposed, involving signal and power modeling and S parameter extraction, time domain analysis, can effectively evaluate the risks and problems in 2.5DIC design.