Simulation-Based Analysis of Land-Side Capacitor Integration in LPDDR5 Dram

This paper presents a thorough study on the potential benefits of Cap-on-Package (CoP) structures in handling the demands of high-performance computing. We particularly focus on the efficiency of incorporating a Land-Side Capacitor (LSC) into DRAM to enhance Power Integrity. Our findings indicate that a higher Power Distribution Network (PDN) resistance substantially reduces peak-to-peak voltage at the DIE pad by approximately 49 %, whereas a lower resistance results in minimal reduction. Additionally, multiple path segments collectively influence the power distribution network's impedance, significantly impacting Power Integrity (PI).