研究论文
Propagation Delay-Based Expression of Power Supply-Induced Jitter Sensitivity for CMOS Buffer Chain
Xin Jie Wang, Tad A. Kwasniewski
Carleton University
来源IEEE Transactions on Electromagnetic Compatibility
年份2016
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摘要与影响
摘要 · 完整
This paper demonstrates a very simple and highly accurate expression of power supply-induced jitter sensitivity transfer function for CMOS buffer chain. The transfer function is mainly a function of the maximum and minimum propagation delay of the buffer chain. The function can be easily obtained and used in jitter budget calculation.
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工程Low-power high-performance VLSI design
Electromagnetic Compatibility and Noise Suppression · Advancements in PLL and VCO Technologies
参考文献 7
CMOS VLSI Design : A Circuits and Systems Perspective
被引 2,219Neil H. E. Weste, David Money Harris · 2004
Analytical Transfer Functions Relating Power and Ground Voltage Fluctuations to Jitter at a Single-Ended Full-Swing Buffer
被引 49Chulsoon Hwang, Jingook Kim, Brice Achkir · IEEE Transactions on Components Packaging and Manufacturing Technology · 2012
Buffer delay change in the presence of power and ground noise
被引 72L.H. Chen, Malgorzata Marek-Sadowska, Forrest D. Brewer · IEEE Transactions on Very Large Scale Integration (VLSI) Systems · 2003
此处列出前 3 条
引用本文 41
A Review on Power Supply Induced Jitter
被引 67Jai Narayan Tripathi, Vijender Kumar Sharma, Hitesh Shrimali · IEEE Transactions on Components Packaging and Manufacturing Technology · 2018
Efficient Modeling of Power Supply Induced Jitter in Voltage-Mode Drivers (EMPSIJ)
被引 42Jai Narayan Tripathi, Ramachandra Achar, Rakesh Malik · IEEE Transactions on Components Packaging and Manufacturing Technology · 2017
Efficient Jitter Analysis for a Chain of CMOS Inverters
被引 37Jai Narayan Tripathi, Puneet Singh Arora, Hitesh Shrimali · IEEE Transactions on Electromagnetic Compatibility · 2018
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