Equalization and A/D Conversion for High-Speed Links

As modern electrical and optical communication systems transition toward advanced modulation schemes, there exists a pressing need for power efficient A/D converters operating at tens of gigasamples per second. Within this context, this chapter will cover circuit- and architecture-level design techniques for the front-end circuitry of ADC-based links. The first part will focus time-interleaved data conversion using SAR and flash topologies. The second part will look into the opportunity of relaxing the ADC requirements using analog pre-equalization.