An Overview of Hot Carrier Degradation on Gate-All-Around Nanosheet Transistors

Gate-All-Around (GAA) Nanosheet (NS) transistors have been identified as the device architecture for 3 nm and beyond as they provide additional scaling benefits. The Hot Carrier (HC) effect cannot be ignored in the development of metal oxide semiconductor field effect transistors (MOSFETs). In this article, we present a comprehensive review of Hot Carrier Degradation (HCD) studies on GAA NS transistors including geometry dependencies, surface orientation impacts, corner effects, characterization methodologies, process impacts and self-heating impacts from different researchers, together with the challenges and outlook, providing an insightful and valuable HCD reliability discussion and review on the cutting-edge technology in continuous MOSFET scaling.