Via-In-Pad Plated Over (VIPPO) Design Considerations for the Mitigation of Unique Solder Separation Failure Mode
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Increasing signal speeds (up to 28Gbps), board functional density and PCB layer count/thickness (up to 140 mils) are increasing the challenges associated with PCB design, especially with respect to the signal integrity. These constraints have forced CAD design engineers to use via-inpad plated over (VIPPO) structures in conjunction with traditional designs, such as dog bone traces, microvias, skipvias and pad-with-trace along with incorporating VIPPO back-drilling techniques in order to achieve routability and signal integrity requirements. Under certain conditions, the use of VIPPO with other pad structures within a BGA footprint can result in a unique failure mode in which the BGA solder joint separates between the bulk solder and the intermetallic compound (IMC) either at the package pad or PCB pad interface, depending on whichever is the weaker interface. It can be either a complete or partial separation and hence, may or may not be detected at ICT/functional test. It is also extremely difficult to detect with inspection methods and is therefore a high risk for potential escapes to the field. This solder separation occurs when the BGA component is subjected to a second reflow, i.e. during top-side SMT if the component is on the bottom-side of the board or during rework of an adjacent component. Details of the failure mode, including root cause hypothesis and specific case studies, will be discussed in this paper. Test vehicles have also been designed to evaluate the influence of various package and PCB design parameters on this failure mode. These include BGA package body size, BGA pitch, VIPPO drill hole size, pad design (NSMD/SMD), microvia/skip via structures, backdrill depth, etc. Based on this work, PCB design guidelines have been established in order to characterize the limits and conditions for acceptable usage of VIPPO structures in order to prevent this type of failure mode from occurring in new product designs.
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工程Electronic Packaging and Soldering Technologies
3D IC and TSV technologies · Integrated Circuits and Semiconductor Failure Analysis